There is a structural shift underway in AI hardware, and most coverage misses the point. Headlines focus on which chip wins — Nvidia’s GPUs, Google’s TPUs, or the latest custom ASIC from a hyperscaler. That competition is real, but it obscures where value is actually accumulating: one layer down, with the companies that manufacture and enable every design.
Foundries, packaging providers, and memory suppliers “get paid” no matter which chip architecture prevails — because all roads converge on the same physical bottlenecks. And those bottlenecks run deeper than most analysis acknowledges, well beyond silicon and memory into substrates, power infrastructure, and raw materials.
While dramatically more efficient AI models could one day cool infrastructure demand, that’s still speculative. For now, every signal points to an AI market running hotter than ever, with capital flowing down the stack to whoever can actually deliver capacity. What follows is a map of those layers: who controls the chokepoints, why that control is so hard to replicate, and why the most durable pricing power often sits where the spotlight doesn’t.
Taiwan Semiconductor Manufacturing Company (TSMC) just committed $56 billion this year in capital expenditures,with a significant portion directed toward new logic and advanced packaging fabrication facilities in Arizona. Samsung Electronics is deploying over $70 billion in 2026 across R&D and manufacturing infrastructure, while SK hynix races to expand memory capacity to meet surging AI-driven demand. But before a single chip rolls off any of these lines, someone has to build the machines that make them possible.
The global semiconductor equipment market grew 15% last year to roughly $135 billion, dominated by five players — Applied Materials, ASML, Tokyo Electron, Lam Research, and KLA — that collectively command around 80% of total spend. The demand engine behind those numbers is structural: fabs in South Korea and Taiwan source little of their equipment domestically, meaning the bulk of every new facility’s capital budget routes to American, European, and Japanese toolmakers. The structural advantages are real, but so are the valuations.
These marquee WFE names are reporting record backlogs, persisting through 2027. So who can pick up the slack? A layer of specialized equipment and component suppliers – many in Taiwan and the U.S. – that don’t make headlines but are no less essential to the fabrication process. These are companies that tend to occupy narrow, defensible niches where switching costs are high, customer qualification cycles are long, and competition is limited by the sheer technical complexity of what they make. These are the names that interest us.
Modern AI processors are not single chips — they are tightly integrated packaged systems of logic and memory. The dominant packaging method, CoWoS (Chip-on-Wafer-on-Substrate), has become one of the tightest bottlenecks in the supply chain.
TSMC is scaling CoWoS production from roughly 35,000 wafers per month in late 2024 to a projected 130,000 wafers per month by end of 2026 — nearly a 4x increase in under two years — and it still isn’t enough to fully satisfy demand. The four largest AI chip designers (Nvidia, Google, AMD, Amazon) consumed roughly 90% of global CoWoS capacity in 2025 while using only a fraction of global wafer production. Packaging, not silicon, is the biggest constraint.
Geography amplifies this. Fabrication, packaging, and assembly are heavily clustered in Taiwan — TSMC handles chip manufacturing along with critical part of advanced packaging, and the overflow is farmed out locally. Smaller Taiwanese packaging houses that were routine assembly shops two years ago are now central participants, with pricing power to match.
Beneath packaging sits an even less discussed constraint: substrates. Advanced chips require ABF (Ajinomoto Build-up Film), a specialized insulating material to connect silicon to the board. There is effectively one supplier: the aptly-named Japan’s Ajinomoto controls over 95% of the global market.
The supply gap is the story. The shortfall between ABF demand and available supply is expected to widen materially through the late 2020s, and Ajinomoto’s committed capacity expansion is unlikely to keep pace — particularly since larger, more powerful chips require disproportionately more substrate material per unit. Alternatives are emerging, including glass substrates and Nvidia’s CoWoP (Chip-on-Wafer-on-PCB), but both remain technically unproven at commercial scale.
In the meantime, the constraint pushes upstream into copper-clad laminates (CCL) and specialty materials. Whatever substrate tech prevails, it drives demand for high-grade CCL that only a small number of qualified producers globally can supply. Kingboard Laminates Holdings is one of the most direct plays; a major producer operating over 20 factories in China, creating both laminates and raw materials like copper foil and epoxy resin. Further down the supply chain, even commodity inputs like copper begin to matter at AI infrastructure scale, boosting the prospects for the likes of Lundin Mining and Antofagasta.
Memory has historically been a brutal, cyclical business — boom-bust margins, chronic oversupply, and cutthroat pricing. AI changed the game with an insatiable appetite for high bandwidth memory (HBM).
All major HBM producers have pre-sold their entire 2026 HBM supply, with SK hynix’s shortage extending into 2027. Margins have expanded materially – in some cases exceeding leading-edge foundry margins – reflecting sustained demand rather than temporary supply discipline.
Samsung Electronics and SK hynix are two of the dominant pillars of a supply-constrained oligopoly, performing well for different reasons. SK hynix, with roughly half of global HBM supply, is Nvidia’s primary partner and the recognized yield leader. Samsung brings a different kind of strength: unmatched scale, balance sheet depth, and vertical integration across memory, foundry, and packaging. Both signed agreements with OpenAI in late 2025 to supply nearly a million memory wafers per month for Stargate – a signal that hyperscalers aren’t picking winners, they are securing capacity from everyone who has it. And rumors are swirling about long-term agreements (LTAs) between Samsung and Google/Microsoft and SK hynix and Meta, with suggestions that LTAs will become commonplace in this current supply-demand environment – which sets a different tone from previous commodity memory cycles.
There’s also an underappreciated second-order effect: HBM consumes significantly more wafer capacity than conventional memory. AI demand is effectively crowding out standard DRAM production, tightening supply and pushing prices higher across servers, laptops, and consumer electronics alike. Samsung has signaled it is raising HBM prices by high-teens to low-twenties percent in 2026 contracts.
More strikingly, conventional DRAM pricing surged nearly 100% quarter-over-quarter in the first quarter 2026, with second quarter pricing still expected to increase well north of 50% sequentially. In effect, the same memory oligopoly is now monetizing both the AI-driven HBM shortage and the tightening conventional DRAM market simultaneously.
Data centers can be built relatively quickly. Power infrastructure cannot. Nearly half of U.S. data center projects face delays due to grid and interconnection constraints. Transformer lead times now stretch multiple years, and grid upgrades can take far longer.
HD Hyundai Electric is a South Korean company that makes the ultra-high-voltage transformers powering this buildout. Their 2025 operating profit jumped nearly 50% year-on-year. They have nearly $7 billion in orders already on the books — more than three years of work — and their strategy is deliberately to chase margin over volume, turning away lower-value business. Fewer than five companies in the world can make transformers at this voltage level for the U.S. utility companies, and the customization at the unit level and logistics of moving hundred-ton units create natural protection against new entrants.
But transformers are only one piece. Power generation itself — from natural gas turbines to nuclear and renewables — faces long lead times, while fuel logistics and pipeline capacity increasingly limit how quickly new data centers can come online. In many regions, the bottleneck is no longer stepping power down, but sourcing it at all.
Cooling is a parallel constraint that’s receiving less attention than it deserves. As compute density rises, traditional air cooling hits physical limits, pushing the industry toward liquid-based systems. This creates an entirely new supply chain — heat exchangers, pumps, specialized fluids, and system integrators — where capacity and expertise are similarly concentrated and not yet priced into the AI buildout story.
Before we wrap up this blog, we must post a footnote: this is not an exhaustive layer map. Think networking and interconnects, software, electronic design automation, data center construction and the list goes on. Several layers follow the same pattern as everything above — high concentration, long build times, and expertise that takes years to replicate — but don’t get the full treatment here. But the premise remains the same…
Packaging is sold out. Substrates are running short. Memory margins are at historic highs. Power infrastructure cannot scale fast enough. At every layer, the companies controlling hard, capacity-limited infrastructure are quietly accumulating pricing power.
These bottlenecks are not permanent. Capital is already flowing aggressively into semiconductor, packaging, substrates, and power infrastructure, and over time this will ease market constraints. As that happens, pricing power will normalize and returns will compress in the most crowded layers of the stack.
But timing matters. In the near-to-medium term, capacity remains structurally tight, build cycles are long, and demand continues to outpace supply. Until that imbalance closes, we think the opportunity to generate alpha from bottleneck-driven pricing power remains intact—particularly in areas where replication is slowest.
This blog was penned by Kenneth Kim, Assistant Portfolio Manager, in June 2026. Mr. Kim joined Polaris as an Analyst in June 2016; he was promoted to Senior Investment Analyst in January 2021 and became an LLC member in January 2022. In January 2025, Mr. Kim was named an Assistant Portfolio Manager, working in cooperation with the portfolio managers on the investment direction of Polaris’ global and international portfolios.
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